changeset 3950:1fededc14646

efm32/recmu: use RC calibration values from the Device Info page
author Alexandre Becoulet <alexandre.becoulet@free.fr>
date Wed, 06 Jun 2018 21:29:06 +0200
parents 632289881a6e
children a4161bb5ee6e
files arch/efm32/drivers/recmu/recmu.c
diffstat 1 files changed, 18 insertions(+), 16 deletions(-) [+]
line wrap: on
line diff
--- a/arch/efm32/drivers/recmu/recmu.c	Wed Jun 06 17:34:37 2018 +0200
+++ b/arch/efm32/drivers/recmu/recmu.c	Wed Jun 06 21:29:06 2018 +0200
@@ -575,36 +575,37 @@
         default:
           return -ENOTSUP;
         }
+      uint_fast8_t band;
       switch (freq->num)
         {
-        case 0:
-          break;
         case 1000000:
-          EFM32_CMU_HFRCOCTRL_BAND_SET(pv->r_hfrcoctrl, 1MHZ);
+          band = EFM32_CMU_HFRCOCTRL_BAND_1MHZ;
           break;
         case 7000000:
-          EFM32_CMU_HFRCOCTRL_BAND_SET(pv->r_hfrcoctrl, 7MHZ);
+          band = EFM32_CMU_HFRCOCTRL_BAND_7MHZ;
           break;
         case 11000000:
-          EFM32_CMU_HFRCOCTRL_BAND_SET(pv->r_hfrcoctrl, 11MHZ);
+          band = EFM32_CMU_HFRCOCTRL_BAND_11MHZ;
           break;
         case 14000000:
-          EFM32_CMU_HFRCOCTRL_BAND_SET(pv->r_hfrcoctrl, 14MHZ);
+          band = EFM32_CMU_HFRCOCTRL_BAND_14MHZ;
           break;
         case 21000000:
-          EFM32_CMU_HFRCOCTRL_BAND_SET(pv->r_hfrcoctrl, 21MHZ);
+          band = EFM32_CMU_HFRCOCTRL_BAND_21MHZ;
           break;
 # if (CONFIG_EFM32_FAMILY == EFM32_FAMILY_LEOPARD) \
   || (CONFIG_EFM32_FAMILY == EFM32_FAMILY_WONDER) \
   || (CONFIG_EFM32_FAMILY == EFM32_FAMILY_GIANT) \
   || (CONFIG_EFM32_FAMILY == EFM32_FAMILY_GECKO)
         case 28000000:
-          EFM32_CMU_HFRCOCTRL_BAND_SET(pv->r_hfrcoctrl, 28MHZ);
+          band = EFM32_CMU_HFRCOCTRL_BAND_28MHZ;
           break;
 # endif
         default:
           return -ENOTSUP;
         }
+      pv->r_hfrcoctrl = (band << EFM32_CMU_HFRCOCTRL_BAND_SHIFT) |
+        cpu_mem_read_8(/* device information page */ 0xfe081dc + band);
 #ifdef CONFIG_DEVICE_CLOCK_VARFREQ
       pv->chg_mask |= EFM32_CLK_MASK(node_id);
 #endif
@@ -625,35 +626,36 @@
         default:
           return -ENOTSUP;
         }
+      uint_fast8_t band;
       switch (freq->num)
         {
-        case 0:
-          break;
         case 1000000:
-          EFM32_CMU_AUXHFRCOCTRL_BAND_SET(pv->r_auxhfrcoctrl, 1MHZ);
+          band = EFM32_CMU_AUXHFRCOCTRL_BAND_1MHZ;
           break;
         case 7000000:
-          EFM32_CMU_AUXHFRCOCTRL_BAND_SET(pv->r_auxhfrcoctrl, 7MHZ);
+          band = EFM32_CMU_AUXHFRCOCTRL_BAND_7MHZ;
           break;
         case 11000000:
-          EFM32_CMU_AUXHFRCOCTRL_BAND_SET(pv->r_auxhfrcoctrl, 11MHZ);
+          band = EFM32_CMU_AUXHFRCOCTRL_BAND_11MHZ;
           break;
         case 14000000:
-          EFM32_CMU_AUXHFRCOCTRL_BAND_SET(pv->r_auxhfrcoctrl, 14MHZ);
+          band = EFM32_CMU_AUXHFRCOCTRL_BAND_14MHZ;
           break;
         case 21000000:
-          EFM32_CMU_AUXHFRCOCTRL_BAND_SET(pv->r_auxhfrcoctrl, 21MHZ);
+          band = EFM32_CMU_AUXHFRCOCTRL_BAND_21MHZ;
           break;
 # if (CONFIG_EFM32_FAMILY == EFM32_FAMILY_LEOPARD) \
   || (CONFIG_EFM32_FAMILY == EFM32_FAMILY_WONDER) \
   || (CONFIG_EFM32_FAMILY == EFM32_FAMILY_GIANT)
         case 28000000:
-          EFM32_CMU_AUXHFRCOCTRL_BAND_SET(pv->r_auxhfrcoctrl, 28MHZ);
+          band = EFM32_CMU_AUXHFRCOCTRL_BAND_28MHZ;
           break;
 # endif
         default:
           return -ENOTSUP;
         }
+      pv->r_auxhfrcoctrl = (band << EFM32_CMU_AUXHFRCOCTRL_BAND_SHIFT) |
+        cpu_mem_read_8(/* device information page */ 0xfe081d4 + band);
 #ifdef CONFIG_DEVICE_CLOCK_VARFREQ
       pv->chg_mask |= EFM32_CLK_MASK(node_id);
 #endif